Computer COMPUTER ORGANIZATION AND ARCHITECTURE part 2 May 15, 2018 papertest 0 Comments computer organization and architecture, computer organization and architecture addressing modes, computer organization and architecture answers, computer organization and architecture by william stallings, computer organization and architecture difference, computer organization and architecture mcqs, computer organization and architecture tutorialspoint Question #1: Booth’s algorithm is used for the arithmetic operation of: multiplication. subtraction. addition. division. Question #2: An instruction cycle refers to executing an instruction. fetching, decoding and executing an instruction. reading and executing an instruction. fetching an instruction. Question #3: Which of the following is a correct statement related to L2 cache memory? none of these The level 1 cache is always faster than the level 2 cache. The level 2 cache is used to mitigate the dynamic slowdown every time a level 1 cache miss occurs. Level 2 cache comes as on board only. Question #4: The principle of locality is used in: DMA Registers Cache memory Interrupt Question #5: By applying the principle of temporal locality, processes are likely to reference pages that…………….. None of these have been referenced recently. are located at address near recently referenced pages in memory. have been preloaded into memory. Question #6: A hardware interrupt is also called an internal interrupt. a clock interrupt. an external interrupt. a processor interrupt. Question #7: Use of cache memory enhances? memory access time. secondary storage access time. effective memory access time. I/O access time Question #8: Which memory unit has lowest access time? Main memory Cache Registers Optical disk Question #9: The reason for improvement in CPU performance during pipe lining is: increase in cache memory. increased clock speed. educed memory access time. introduction of parallelism. Question #10: During DMA transfer, the DMA controller takes over the buses to manage the transfer: Directly between the I/O device and memory Directly between the memory and registers Directly from memory to CPU. Directly from CPU to memory. Congratulations, you passed! I'm sorry but you did not achieve the required score.